IntroductionThe 6x86MX was officially launched in may 97, but was only available from retail channels here in France about 3 months later. In october 97 the 6x86MX-PR166 was priced just under $100 in single units. In december 97 this same chip was selling around $85.
The 6x86MX dies are manufactured by IBM and then tested at different clock rates, resulting in three performance ratings: PR-166, PR-200, PR-233. These PR ratings do not correspond to true core clock rates, but are supposed to indicate performance equal to or better than the corresponding Intel Pentium MMX chips, as measured by common Windows 95 and Windows NT benchmarks (mainly Business Winstone 97, a benchmark suite belonging to Ziff-Davis Benchmark Operations).
However, what really matters for Linux users is Linux performance, as measured by Linux benchmarks (see the Linux Benchmarking Project site). In this respect, 6x86MX CPUs do quite well.
The 6x86MX is not a revolutionary new design, it is rather a careful evolution of the basic 6x86 design which is already quite advanced:
|
CPU design feature |
6x86 and 6x86L |
6x86MX |
Notes |
| L1 cache size and organization |
16Kb unified |
64 Kb unified |
4-way set associative 32-byte lines L1 cache + 256 byte (also 32-byte lines) fully associative instruction line cache |
| 4 Kb paging caches |
4 entry Directory Table cache (DTE) + 128 line Translation Lookaside Buffer (TLB) cache + 8 entry Victim TLB cache |
16 entry L1 TLB + 384 entry L2 TLB. No DTE cache. |
The architecturally simpler but larger page table caches in the 6x86MX seem more efficient. |
| MMX instruction set |
NO |
Yes |
GNU/Linux doesn't use any MMX instructions. |
| Performance monitoring registers |
NO |
Yes |
Complete performance monitoring system, even improves on the Intel Pentium implementation. |
| CPUID |
Disabled after reset |
Enabled after reset |
The 6x86 will look like an unknown 486, the 6x86MX like an A-step PPro after reset. |
| Variable-size paging mechanism (VSPM) |
Yes |
NO |
Cyrix decided not to carry this feature from the 6x86 to the 6x86MX. |
| Family code |
05h |
06h |
The 6x86 tries to look like a Pentium, the 6x86MX like a PPro. |
| DIR0 |
3xh |
5xh |
The lower 4 bits of DIR0 provide information on the clock multiplier. |
| SLOP
(CCR5 bit 1) |
Slows down the LOOP instruction; was implemented in the 6x86 for compatibility with old DOS games! Normally disabled after reset. |
Reserved |
Obsolete feature, not needed on the 6x86MX. |
| DTE_EN
(CCR4 bit 4) |
Disabled after reset, must be enabled by set6x86. |
Reserved |
Not needed on the 6x86MX since it does not have a DTE cache. |
| LBR1
(CCR5 bit 4) |
Asserts LBA# pin for accesses in the 640Kb to 1Mb region. Disabled after reset. |
Reserved |
Marginally useful feature. |
| WWO
(RCR1-7 bit 1) |
Enables weak write ordering for each defined ARR. Disabled after reset. |
Reserved |
Marginally useful feature. |
Cyrix CPU designer Robert Maher prepared a set of 15 slides available on the Web, describing the MMX instruction set implementation in the 6x86MX: Multimedia Instruction Set Extensions for a 6th Generation Processor. Cyrix engineers designed a 100% compatible MMX implementation which uses just ~ 20.000 transistors (< 1% of total CPU die area).
I have used an extract from the results provided with nbench-byte version 2.1, a benchmark suite that originated at BYTE magazine and is now maintained by Uwe Mayer. Note that I contributed the 6x86L and 6x86MX figures to the sample results file included with the nbench-byte-2.1 source:
The indices below are with respect to the new AMD K6/233 baseline.
OS : LINUX 2.0.31 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : Intel Pentium 133 MHz L2 cache : 512 KB MEMORY INDEX : 0.383 INTEGER INDEX : 0.444 FLOATING-POINT INDEX: 0.632
OS : SunOS 5.5.1 C compiler : cc libc : unknown version CPU : SUN-Ultra-Enterprise-2 sparc L2 cache : ? MEMORY INDEX : 0.417 INTEGER INDEX : 0.546 FLOATING-POINT INDEX: 1.028
OS : LINUX 2.0.29 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : Cyrix 6x86L PR200+ (at 2 x 75 = 150 MHz) L2 cache : 256 KB MEMORY INDEX : 0.666 INTEGER INDEX : 0.599 FLOATING-POINT INDEX: 0.508
OS : LINUX 2.0.31 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : Intel Pentium MMX 200 MHz L2 cache : 512 KB MEMORY INDEX : 0.601 INTEGER INDEX : 0.636 FLOATING-POINT INDEX: 0.970
OS : LINUX 2.0.31 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : Intel 686 PentiumPro 200 MHz L2 cache : 256 KB (internal) MEMORY INDEX : 0.699 INTEGER INDEX : 0.732 FLOATING-POINT INDEX: 1.140
OS : LINUX 2.0.29 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : Cyrix 6x86MX PR233 (at 2.5 x 75 = 187.5 MHz) L2 cache : 512 KB MEMORY INDEX : 0.861 INTEGER INDEX : 0.773 FLOATING-POINT INDEX: 0.730
OS : LINUX 2.0.32 C compiler : gcc version 2.7.2.3 libc : libc.so.5.4.38 CPU : AMD K6/233 L2 cache : 512 KB MEMORY INDEX : 1.000 INTEGER INDEX : 1.000 FLOATING-POINT INDEX: 1.000
As you can see from these results, the 6x86MX at 187.5MHz will easily beat the 200MHz Pentium Pro on the memory and integer tests. The traditional floating-point weakness of the 6x86 family is not really relevant for most GNU/Linux users (but note that the 6x86MX improves on the 6x86L with respect to FPU performance). Also, as you can see, the 6x86L PR200 does not compare badly next to the much more expensive and higher clocked Pentium MMX 200.
If your present motherboard supports dual-voltage CPUs like the Pentium MMX, chances are it will also accept the 6x86MX. Check first that it has a 2.9V setting for CPU core voltage. As marked on the chips themselves, 6x86MX CPUs' cores run at 2.9V.
Second, does the BIOS support the 6x86MX? If not, you may need a BIOS upgrade. This is free if your BIOS chip is of the Flash/EEPROM type (you can usually download new BIOS versions from the motherboards manufacturer's Web site), otherwise the BIOS chip will have to be replaced (it is probably not soldered to the motherboard). Be very careful if you need to flash a new BIOS; follow exactly the instructions on your motherboard user's manual.
Even if your motherboard does not support dual-voltage CPUs, you can still install a 6x86MX, using a special voltage adapter. However, it may just be simpler (and cheaper) to buy a new motherboard, which could also improve the performance of your Linux box (see the FAQ section).
The 6x86MX is much more flexible when it comes to clock multipliers, compared to previous 6x86 CPU family members.
| 6x86 | 6x86L | 6x86MX |
| 2 x, 3 x | 2 x, 3 x | 2 x, 2.5 x, 3 x, 3.5 x |
Like the 6x86L, the 6x86MX has a split-rail dual voltage supply. Note that to improve yield, IBM had to raise the core voltage from 2.8V to 2.9V.
| 6x86 | 6x86L | 6x86MX |
| 3.3V or 3.52V | 3.3V I/O, 2.8V core | 3.3V I/O, 2.9V core |
The default rc.cyrix file that is included with set6x86 has to be edited for the 6x86MX. The SLOP flag (bit 1 of CCR5) and the DTE_EN flag (bit 4 of CCR4) are reserved bits on the 6x86MX and should not be touched. The corresponding lines in rc.cyrix can be deleted with any text editor, or a replacement rc.6x86MX can be downloaded by shift-clicking here.
Since Cyrix was merged with National Semiconductors, we could think that the company would concentrate on its MediaGX CPUs for low-cost computers and leave AMD and Intel to battle in the high-performance x86 CPU segment, but reportedly Cyrix will continue to work on improving the 6x86MX architecture, and we can expect to see faster, more complex chips in the next few months.
Almost in the same time frame, Centaur is beginning production of its C6 Pentium compatible processor, and AMD is working frantically to improve yields on its K6-233. AMD is also going to implement a revised K6 using 0.25 micron technology, and raise clock rates.
This is good news for Linux users, because competition is likely to bring CPU prices down and push technology forward, and we can hold on to our i386 Linux kernels and distributions for some more time.
Another related issue is that of motherboard chipsets. Intel is trying to achieve a totally monopolistic position in this market by not licensing their proprietary Slot-1 and Slot-2 technologies. The microcomputer market has responded by pushing Socket 7 specifications to allow 100 MHz host bus clocks (this is called Super 7 by AMD), a trend that Cyrix had started with the 6x86 PR200+. An M3 running at 4 x 100 Mhz on a Super 7 motherboard would easily reach the performance of a Pentium II running at 600 MHz (pure guesswork on my part, based on actual 6x86MX and Pentium II performance figures). Right now the Pentium II is running at 300 MHz, so Moore's law gives us another 2 years before we have to begin worrying about new technologies to replace the Socket 7 motherboards.
I was very enthusiastic about Digital's superiorAlpha 64-bit RISC architecture, specially after reading an article on their newest processor, the 21264 (clocked at 600MHz!). Unfortunately, it seems Digital is giving up on the Alpha (I have contradictory information available as to Digital's apparent intents concerning the Alpha), as a result of a series of legal battles with Intel over patent infringements. I had hopes that with Samsung and Mitsubishi backing the Alpha CPUs, we might someday see a relatively cheap, high performance PCI Alpha motherboard coming out, but Intel's lawyers wouldn't have it this way.
Right now the cheapest Alpha machine that can be bought is a $1.895 system put together by MicroWay. This high quality 566MHz 21164PC screamer is shipped complete with 32Mb SDRAM and an IDE hard disk, but without monitor. Note that 64Mb of SDRAM would me more adequate for this system, since Alpha executable code produced by gcc is usually longer than the equivalent x86 code.
Finally, it seems the first 64-bit Intel "Merced" CPUs will cost around $5.000, with a "cheaper" version at around $1.000 coming out in late 1999. Should Linux users care? Not yet.
Last updated on January 8, 1998.
Copyright 1997, 1998 Andrew D. Balsa